Robust and Compact Quaternary Symbol Coding 3Cells/2Bits16MB Embedded PCM Solution in 28nm FD-SOI CMOS with Automotive Grade

Robust approach of differential memory is key factor for Phase Change Memory (PCM) in embedded Non-Volatile Memory (e-NVM) within automotive digital products. The automotive grade 0 reliability level is granted with robust margin at the cost of using two physical cells per logical bit, therefore doubling the area of the single bit $(0.038 \mu \mathrm{~m} 2)$ [1]. In this paper we propose an equivalent of 1.5 x single cell area per bit $(0.028 \mu \mathrm{~m} 2)$, based on a design solution using quaternary state symbol representation featuring the smallest equivalent bit area with respect to the state-of-the-art solutions including MRAM and RRAM. The saving comes at no extra technology cost with respect to the existing production PCM-based 28nm FD-SOI CMOS technology. The proposed Macrocell array and decoding circuitry area scales down by 20% with respect to available implementations and automotive grade robustness and reliability is maintained thanks to an Error Correction Code (ECC) specifically designed for quaternary symbol representation.