AR-CIM: A 460.22TOPS/W SRAM-based Analog Reconfigurable Computing-in-Memory Macro with 1/2/4/8-Bit Variable Precision
This work presents an SRAM-based analog reconfigurable computing-in-memory macro with 409.6-GOPS throughput and 460.22-TOPS/W energy efficiency. The proposed reconfigurable macro supports $1 / 2 / 4 / 8 \mathrm{~b}$ inputs and $1 / 2 / 4 / 8 \mathrm{~b}$ signed weights while maintaining 100% memory utilization. Furthermore, we propose (i) a dual-domain DAC to achieve high-precision input with low area overhead and (ii) an input-sense-and-skip SAR ADC, which reduces the average power overhead by 54% compared with conventional SAR ADC.
Authors
- Minkyu Je (ORCID: https://orcid.org/0000-0003-4580-2771)
- Sohmyung Ha (ORCID: https://orcid.org/0000-0003-3589-086X)
- Ik‐Joon Chang (ORCID: https://orcid.org/0000-0002-8871-8695)
- Bo‐Ran Choi (ORCID: https://orcid.org/0000-0002-1366-4688)
- Edward Choi (ORCID: https://orcid.org/0000-0002-3809-9734)
- Donghyeon Yi (ORCID: https://orcid.org/0009-0003-7877-5455)
- Jiho Chun (ORCID: https://orcid.org/0009-0006-0965-9241)
Institutions
- New York University Abu Dhabi (AE)
- Korea Advanced Institute of Science and Technology (KR)
- Kyung Hee University (KR)
Publication Details
- Published
- 2024-09-09
- DOI
- https://doi.org/10.1109/esserc62670.2024.10719461
- Citations
- 2
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.42