A 6.8GHz -269.9 FOM_{Jitter-N-Area} Fractional-N Pulse Shaper Based PLL with Range Extension DTC

This paper presents a 6.8 GHz compact digital fractional-N PLL based on pulse-shaped loop filter, where a much wider bandwidth beyond the traditional limit can be used to suppress more ring oscillator noise while maintaining a good stability. By leveraging a range-extension constant-slope DTC, half capacitor array has been saved for the same cover range. The embedded nonlinearity cancellation and offset compensation technique further improve the spectrum spurious tones. Fabricated in a $28-\mathrm{nm}$ CMOS process, the PLL achieves an integrated jitter of 804fs and $\mathbf{- 5 3. 2 d B c}$ fractional spur at near-integer channels with a power consumption of 5.68 mW. Occupying core area of $0.025 \mathrm{~mm}^{2}$, the calculated FoM<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Jitter-N-Area</inf> is -269.9.