A 61.4Gb/s/mm 1.42-pJ/b Symmetric Correlated Coding Wireline Transceiver With Single-Ended Crosstalk Cancelling for D2D Interconnection

This work presents a seven-bit transceiver operating on eight-lane transceiver featuring crosstalk cancelling scheme, Symmetric Correlated Coding (SCC). The transceiver supports Die to Die (D2D) transmission at a rate of $61.4 \mathrm{~Gb} / \mathrm{s} / \mathrm{mm}$ with an energy efficiency of $1.42 \mathrm{pJ} / \mathrm{b}$ over high-density parallel inter-chip channels. By utilizing the correlation of channels for coding, the SCC transceiver, with 87.5% pin efficiency eliminates $34.4 \%$ of crosstalk between channels during single-ended transmission. The proposed design is implemented in a 28 nm CMOS, measured on 3-mil-spaced eight-channel coupled Printed Circuit Board microstrips. For -3dB insertion loss and -5.8dB FEXT at 5 GHz Nyquist frequency, the eye opening is broadened to 0.55 UI at a bit error rate (BER) $\lt 10 \mathrm{E}-12$ at $10 \mathrm{~Gb} / \mathrm{s}$.