A 0.81 mJ/frame, Real-time LiDAR Odometry and Mapping Processor with Memory-efficient kNN and Reconfigurable Architecture

This paper proposes a low-latency and energy-efficient LiDAR Odometry and Mapping (LOAM) processor. The memory-efficient point matching core (PMC) with hash page-based memory management unit reduced 96.9% of the required on-chip memory footprint for kNN by prediction-based dynamic memory allocation utilizing spatio-temporal coherency of LiDAR points. Moreover, the neighbor-bin cache increases the energy efficiency of PMC $10.5 \times$ by minimizing the redundant onchip memory access. The reconfigurable non-linear optimization (NLO) core ensures full utilization while inferencing NLO which requires different levels of computation parallelization due to the heterogeneous characteristics, shortening the latency by $\mathbf{9 2. 3 \%}$. The fabricated chip achieves 36.9 ms of latency and 0.81 $\mathrm{mJ} /$ frame of energy efficiency at 0.7 V and 50 MHz, accelerating LOAM in real-time.