A 36–60 Gb/s 253 fs_rms Continuous-Rate Reference-Less CDR with Baud-Rate Unlimited-Range Frequency Acquisition Technique in 28-nm CMOS

This paper presents a continuous-rate referenceless clock and data recovery (CDR) circuit with a baud-rate unlimited-range frequency detector (BR-URFD). An integrator-based phase detector (IPD) that shares the same integration front-end (IFE) with the BR-URFD is proposed to achieve the baud-rate phase acquisition. By adopting the baudrate frequency and phase acquisition, this CDR is capable of supporting higher data rates. To further extend the capture range and lower the jitter of the recovered clock, a multi-core LC voltage-controlled oscillator (LC-VCO) is introduced in this work. The prototype CDR is fabricated in a $28-\mathrm{nm}$ CMOS process and achieves 36-to-60 Gb/s capture range, 253.2 fs $_{\text {rms }}$ clock jitter, $\lt 10^{-12}$ bit-error-rate (BER), and $1.02 \mathrm{pJ} /$ bit energy efficiency, which compares favorably with the state-of-the-art. Keywords-clock and data recovery (CDR), integration frontend (IFE), baud-rate unlimited-range frequency detector (BRURFD)