A Highly Linear Wideband Receiver Front-End for RF-ADCs with 1.3 dB NF and Matching to 12.5Ω Differential Impedance

In this work a front-end for a direct RF-sampling receiver implemented in 22 nm FD-SOI CMOS technology is presented. To achieve high blocker tolerance and wide bandwidth, an LNA with a differential input impedance of $12.5 \Omega$ is designed. An off-chip wideband transmission line transformer is used to transform the $100 \Omega$ antenna impedance to $12.5 \Omega$. The frontend also features a VGA which can program the gain with low penalty in dynamic range. Furthermore, an equalizer supports three concurrent frequency bands with orthogonal frequency and gain tuning for each. The front-end consumes 172 mA from a 1.5 V supply and has an NF of 1.3 to 2 dB, while the IIP3 is -12 dBm at maximum gain and the frequency range is 1.55 to 4.8 GHz. The equalizer improves the IIP3 by up to 12 dB at the frequencies outside the supported bands where blockers are expected.