Capacitor Voltage Feedback Active Damping With Reduced Computation Delay for Improving Voltage Control Performance of LC‐Type Grid‐Forming Inverter

ABSTRACT In low‐voltage applications using low‐Q LC filters, alias‐free capacitor voltage acquisition can be achieved, but synchronous capacitor voltage sampling under high‐Q filters used in high‐voltage applications in grid‐forming converters causes some degree of distortion and results in degradation of the power supply quality. And the inherent 1.5 sampling periods that delay in this approach limit the control bandwidth, reduce the stability region, and result in an inadequate time domain response. Despite these shortcomings, this approach is widely accepted in practice. The conclusion of this paper is that shifting the capacitor voltage sampling instant to 2 µs before the pulse width modulation (PWM) reference voltage update results in almost the same distortion as synchronous sampling. However, it can improve the dynamic performance of the system. A distortion‐acceptable univariate feedback voltage dual‐loop active damping control topology with much reduced computational delay is proposed, which is based on an internal active damping loop using a discrete lead compensator and a proportional resonance controller in the external voltage loop.