Design of a high linearity power amplifier with temperature compensation bias circuit

Based on GaAs HBT technology, a narrowband high linearity power amplifier chip operating in the 2.48-2.51 GHz frequency range was designed. The amplifier adopts a three-stage amplification structure to ensure high gain and high output power. Designed is a temperature-compensated adaptive bias circuit structure, which effectively suppresses the selfheating effect of HBTs, ensuring high linearity of the power amplifier. The output matching circuit was optimized to suppress harmonic components. Test results demonstrate that within the 2.48-2.51 GHz frequency range at room temperature, the output saturated power is 37.5 dBm with 1 dB compression, achieving an efficiency of 41%. The Error Vector Magnitude (EVM) is less than 4%, Adjacent Channel Power Ratio (ACPR1) is less than -30 dBc, and Second Adjacent Channel Power Ratio (ACPR2) is less than -40 dBc. The power amplifier utilizes an unpackaged die combined with external circuit integration, where the input and output matching circuits are achieved through off-chip substrate matching, reducing the chip area and facilitating later-stage debugging, meeting the application requirements of mobile communication systems.