Structure-Logic Circuits of Self-Compensation Sub-Circuits of CMOS Transistor’s (Si-SOI, GaN, GaAs, SiC) Parasitic Capacitances in High-Impedance Unit of High-Temperature Transimpedance and Operational Amplifiers

Possible variants of the constructing compensation sub-circuits for output CMOS transistor’s gate-to-drain capacitance in active loads and reference current sources in high-temperature broadband amplifiers are considered. The basic circuits of operational (Op-Amp) and transimpedance (TIA) amplifiers with their self-compensation, ensuring an increase in their upper cut-off frequency, are presented. These circuits differ from each other in the channels for transmitting small AC currents through the parasitic drain-gate capacitances of CMOS transistors using Si-SOI, GaN, GaAs, SiC technical processes. These circuits differ in the channels used to carry small AC currents through the parasitic drain-gate capacitances of CMOS transistors using Si-SOI, GaN, GaAs, SiC technology processes. As an example, the equations for the transfer function of one of the options for constructing broadband amplifiers are obtained.