SiC JFET Template Model for Extremely High-Temperatures

The paper proposes a compact model of a silicon-carbide (SiC) field-effect transistor with control p-n junction (JFET) whose parameters are determined by measurements. The model is developed using the template modeling method, in which constant parameters of the model are replaced by fractional-rational functions (Padé approximation), allowing to describe more accurately the physical processes in the electronic component without violating the nature of their change. The demonstrated SiC JFET model is formulated as a function of both the fundamental process parameters that control the electrical behavior of the device (e.g., threshold voltage) and the geometric layout parameters associated with the device (e.g., device length and width), providing a rational basis for statistical modeling of process variation effects.