Analysis and Optimization of HBM3 PPA for TSV Model With Micro-Bump and Hybrid Bonding
This article investigates the performance of the proposed through-silicon via (TSV) with micro-bump and hybrid bonding techniques in the third generation of high-bandwidth memory (HBM3). Equivalent circuit models are proposed and the advantages and disadvantages of the two techniques are compared. A good agreement between the results of the equivalent model and the full-wave simulation from the ANSYS HFSS 3-D electromagnetic (EM) solver is validated. The dynamic power consumption, signal integrity (SI) performance, and area (PPA) are established based on the equivalent circuit models for both approaches. The hybrid bonding technique is superior to the micro-bump in all aspects. In addition, the contour plot and electrical behaviors of the hybrid bonding model are analyzed with variations in design parameters. Through the analysis in the time domain, a method to optimize the PPA matrix is proposed, validated with an 8% improvement in the eye-opening value, proving effective.
Authors
- Tzong‐Lin Wu (ORCID: https://orcid.org/0000-0002-3560-8898)
- Yuying Cheng (ORCID: https://orcid.org/0009-0000-6797-0413)
- Long-Sun Huang (ORCID: https://orcid.org/0009-0008-4611-7630)
Institutions
- National Taiwan University (TW)
Publication Details
- Journal
- IEEE Transactions on Components Packaging and Manufacturing Technology
- Published
- 2024-10-18
- DOI
- https://doi.org/10.1109/tcpmt.2024.3483445
- Citations
- 2
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.42
Funders
- National Science and Technology Council