Machine Learning-Assisted Device Circuit Co-Optimization: A Case Study on Inverter
This study demonstrates a machine learning (ML)-assisted device circuit co-optimization technique. A basic CMOS inverter cell is employed to demonstrate this proof of concept. The voltage transfer and the switching characteristics are examined to observe the on- and off-state behavior while applying two short square pulses of 140 ns and 100 ps, respectively. By applying the proposed ML-based optimization method using the actor and critic neural networks, the mixed-mode simulation [i.e., technology computer-aided design (TCAD) and SPICE] outputs toward the desired behavior of the circuit, and parameters, including area factor, doping concentration, capacitance value, and width and length of the device, are optimized. Compared with the manual design case, the co-optimized design surpasses several figures of merit (FoMs), such as propagation delay and overshoot, which pave the way for future research on more complex circuit design challenges.
Authors
- Ankit Dixit (ORCID: https://orcid.org/0000-0002-6653-6460)
- Naveen Kumar (ORCID: https://orcid.org/0000-0002-4765-1789)
- Vihar Georgiev (ORCID: https://orcid.org/0000-0001-6473-2508)
- Liyuan Xue (ORCID: https://orcid.org/0000-0001-5849-9391)
- Yu Liu (ORCID: https://orcid.org/0009-0008-2462-5378)
Institutions
- University of Glasgow (GB)
Publication Details
- Journal
- IEEE Transactions on Electron Devices
- Published
- 2024-10-17
- DOI
- https://doi.org/10.1109/ted.2024.3476231
- Citations
- 5
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 1.04
Funders
- Engineering and Physical Sciences Research Council