RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique

The automatic generation of RTL code (e.g., Verilog) using natural language instructions and large language models (LLMs) has attracted significant research interest recently. However, most existing approaches heavily rely on commercial LLMs, such as ChatGPT, while open-source LLMs tailored for this specific design generation task exhibit notably inferior performance. The absence of high-quality open-source solutions restricts the flexibility and data privacy of this emerging technique. In this study, we present a new customized LLM solution with a modest parameter count of only 7B, achieving better performance than GPT-3.5 on all representative benchmarks for RTL code generation. Especially, it outperforms GPT-4 in VerilogEval Machine benchmark. This remarkable balance between accuracy and efficiency is made possible by leveraging our new RTL code dataset and a customized LLM algorithm, both of which have been made fully open-source. Furthermore, we have successfully quantized our LLM to 4-bit with a total size of 4 GB, enabling it to function on a single laptop with only slight performance degradation. This efficiency allows the RTL generator to serve as a local assistant for engineers, ensuring all design privacy concerns are addressed.

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Publication Details

Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Published
2024-10-17
DOI
https://doi.org/10.1109/tcad.2024.3483089
Citations
42
Primary Topic
Embedded Systems Design Techniques
Type
article
Field-Weighted Citation Impact
20.54
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article

RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique

Hongce Zhang, Zhiyao Xie, Jing Wang, Qijun Zhang et al.
42 citations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Embedded Systems Design Techniques
20.54
article

RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique

Hongce Zhang, Zhiyao Xie, Jing Wang, Qijun Zhang, Shang Liu, Yao Lu, Wenji Fang
article en
42 citations

Abstract

The automatic generation of RTL code (e.g., Verilog) using natural language instructions and large language models (LLMs) has attracted significant research interest recently. However, most existing approaches heavily rely on commercial LLMs, such as ChatGPT, while open-source LLMs tailored for this specific design generation task exhibit notably inferior performance. The absence of high-quality open-source solutions restricts the flexibility and data privacy of this emerging technique. In this study, we present a new customized LLM solution with a modest parameter count of only 7B, achieving better performance than GPT-3.5 on all representative benchmarks for RTL code generation. Especially, it outperforms GPT-4 in VerilogEval Machine benchmark. This remarkable balance between accuracy and efficiency is made possible by leveraging our new RTL code dataset and a customized LLM algorithm, both of which have been made fully open-source. Furthermore, we have successfully quantized our LLM to 4-bit with a total size of 4 GB, enabling it to function on a single laptop with only slight performance degradation. This efficiency allows the RTL generator to serve as a local assistant for engineers, ensuring all design privacy concerns are addressed.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsVol. 44(4)
Hong Kong University of Science and Technology (HK)
Openalex Percentile: Top 0%
Embedded Systems Design Techniques
20.54
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