General Performance Enhancement for Capacitor-Less Low-Dropout Regulator Using Local Positive-Feedback Technique

This article proposes a local positive-feedback loop (LPFB) technique for capacitor-less low-dropout regulator (CL-LDO). Compared with the conventional counterpart with multistage error amplifier, it only adopts a single stage structure to improve the general performances of CL-LDO, including transient response and load/line regulation. This technique not only achieves an extended loop bandwidth and an ultra large charging/discharging current to improve the transient response, but also produces a negative resistance to increase the loop gain, thereby optimizing the load/line regulation. The proposed CL-LDO was fabricated in SMIC 0.18 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\mu$</tex-math></inline-formula>m CMOS process with a small size of 0.0326 mm<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$^{2}$</tex-math></inline-formula> . The experimental results demonstrate that it has a transient overshoot/undershoot voltage of 142 mV/126.9 mV for a step of 0.1–50 mA with 100 ns edge time. It also accomplishes a better load/line regulation of 0.476 mV/mA and 3.484 mV/V. The proposed CL-LDO realizes the best FoM value of 0.74 mV, and finally proves the effectiveness of the proposed technique.