No off-chip capacitance LDO transient enhancement and frequency optimization
Based on the MGN18nmCMOS process, an off-chip capacitor-free LDO circuit is proposed and designed. The difference between the off-chip capacitor-free LDO and traditional LDO lies in the size of the output load capacitance. Because the on-chip load capacitance of LDO is small, it can be integrated into the chip, which greatly saves the area. But it has two problems: it is difficult to get the loop stability and the output voltage variation at load transients is large. In this design, active feed-forward frequency compensation is used to realize LDO loop stability. The output voltage detection circuit is used to provide the charging and discharging path for the power MOSFET and to get a fast regulation of its on resistance, resulting in fast regulation to output voltage without large variation at load transient. The simulation results show that the output voltage overshoot voltage and undershoot voltage are 538mV and 453mV respectively and can be stabilized in 30ns when the load current varies between 0 and 50mA in 10ns. Therefore, stability and response speed of the proposed capacitor-free LDO are greatly improved.
Authors
- Jinjun Zhang (ORCID: https://orcid.org/0000-0001-8185-2173)
- Shengming Huang (ORCID: https://orcid.org/0000-0002-4586-3067)
Institutions
- Tianjin University of Technology (CN)
Publication Details
- Published
- 2024-10-16
- DOI
- https://doi.org/10.1117/12.3034300
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00