Switched-Capacitor ADC Error and Performance Analysis

This article presents the findings from a simulation study on an interpolating analog-to-digital converter (ADC), which is classified as a high-precision device. The study reveals that the proposed interpolating ADC significantly enhances both accuracy and speed of conversion, outperforming known analogs by at least twice. For certain sub-ranges, improvements in accuracy and speed are observed to be more than double. The combined output code error of the interpolating ADC is found to be less than the set value at the 2<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nd</sup> stage of conversion by 4–5 times, with errors not exceeding 0.022% for a set $0.1 \%, 0.01 \%$ for a set 0.05%, and 0.0022% for a set 0.01%. The conversion duration increases twofold in the millivolt range when the set error values are halved, while in the range above 1V, the duration remains under $300 \mu \mathrm{s}$ for both cases. For the highest set error of 0.001%, the duration can reach up to 2 ms. The optimally chosen interpolating converter with an increased accuracy to 0.05% demonstrates typical performance in the 1 mV–1V range and showcases a conversion speed twice as fast in the 1V–10V range with enhanced accuracy. The proposed interpolating converter is thus considered a superior high-precision device, offering significant improvements in both accuracy and speed for various operating sub-ranges.