A 150-GHz Single-to-Differential LNA Adopting Wideband G _max -Cores Based on Single-Ended Compact Lumped <i>L</i> - <i>C</i> - <i>L</i> and Differential Coupled-Line Embedding Networks

This work presents a high-gain and wideband 150-GHz LNA featuring a single-to-differential (S2D) topology. The S2D topology eliminates the need for a lossy balun in the input matching network, resulting in an inherent improvement of the achievable noise figure (NF). The proposed four-stage LNA is implemented based on high-gain and wideband <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$ </tex-math></inline-formula>-cores. For a compact realization, the first-stage single-ended (SE) <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$ </tex-math></inline-formula>-core uses lumped elements (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i>-<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">C</i>-<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">L</i>) within its embedding network. In addition, a pseudo-simultaneous noise and input matching (p-SNIM) technique is used to mitigate the tradeoff between gain and noise characteristics. Differential wideband <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$G_{\max }$ </tex-math></inline-formula>-cores in the subsequent stages use a coupled-line-based embedding network (CLEN) without any explicit capacitors. It helps simplify the dc biasing and generally enhances the tolerance to process variations with a compact form factor. Implemented in a 40-nm CMOS technology, the proposed LNA achieves a peak power gain of 20.0 dB, a 3-dB bandwidth of 18.8 GHz, a minimum NF of 4.9 dB, and a maximum OP<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub>/IP<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> of −7.7/−22.4 dBm, respectively, while dissipating dc power of 19.6 mW. To the authors’ best knowledge, this work is the first implementation of an S2D LNA operating above 100 GHz using CMOS technologies.