Atomic Layer Deposited ZnO Negative Capacitance Thin-Film Transistors With Hf_0.5Zr_0.5O₂-Based Ferroelectric Gates

High-performance ZnO thin-film transistors (TFTs) with Hf<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{{0}.{5}}$ </tex-math></inline-formula>Zr<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{{0}.{5}}$ </tex-math></inline-formula>O2 (HZO)-based ferroelectric gates have been designed and fabricated. In order to increase the thickness of HZO without sacrificing their ferroelectric properties and reducing the leakage current of the devices, multilayer nanolaminate structure was designed, which allows the HZO dielectric layer to still have a high remnant polarization (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2{P}_{\text {r}}= 50.2~\mu $ </tex-math></inline-formula>C/cm<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{{2}}\text {)}$ </tex-math></inline-formula> at a thickness of 30 nm. By introducing multilayer nanolaminate HZO film, the devices exhibit excellent performance, including an ultralow subthreshold swing (SS) of 96.4 mV/dec at room temperature, which is only 47% of the SS of conventional TFTs under the same process conditions, a large <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\text {ON}}$ </tex-math></inline-formula>/<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\text {OFF}}$ </tex-math></inline-formula> ratio of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{{8}}$ </tex-math></inline-formula>, a high field-effect mobility of 16.3 cm2V<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-{1}}$ </tex-math></inline-formula>s<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-{1}}$ </tex-math></inline-formula> and a proper threshold voltage of 0.5 V. Our results demonstrate the feasibility of augmenting switching speed and reducing the power consumption of ZnO TFTs by introducing HZO ferroelectric gates.