ED-MPIM: An Energy-Efficient Event-Driven Smart Vision SoC With High-Linearity and Reconfigurable MRAM PIM

This study introduces an event-driven smart vision system-on-chip (SoC) using a reconfigurable and high-linearity magnetoresistive random access memory (MRAM) processing-in-memory (PIM) architecture. It features a double differential MRAM PIM column with dual complementary 4T4R cells for enhanced MAC operation accuracy and a dynamic 2T2R–4T4R macro for adjustable precision and throughput. Incorporating an aggregation pipeline (AGP) and the intra- and inter-cluster mapping schemes, the reconfigurable PIM achieves improved utilization and energy efficiency. The system also offers a multi-level and crossover event detection mechanism via binary similarity computing for adaptable object recognition in varying conditions. Fabricated with 28-nm FD-SOI technology, the SoC encompasses a die area of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$9.72~{\text {mm}^{2}}$ </tex-math></inline-formula> with 128 kb of MRAM cell capacity, integrating a 64-bit RISC-V core, and an 8-bit grayscale CMOS sensor with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$128 \times 128$ </tex-math></inline-formula> pixel resolution. The SoC demonstrates up to 709.3-TOPS/W macro-level energy efficiency at 200 MHz for 1-bit input/weight and 3-bit output. It also attains an average end-to-end system efficiency of 7.57 TOPS/W when performing 8-bit ResNet-20 inference with accuracies of 91.90% and 67.61% on the CIFAR-10/100 datasets. The SoC significantly reduces core power consumption to 7.3 mW in moving object detection, achieving a 30.9% power reduction over conventional non-event-driven designs.