Analysis of Thermal Expansion Behavior and Interface Evolution of TSV Under Thermal Cycle Loading Based on Crystal Plastic Finite Element Method
As a key vertical interconnection microstructure, Through-Silicon Via (TSV) plays an important role in three-dimension (3D) chips. The reliability issues of TSV are becoming more and more prominent in the increasingly harsh service environment, and the failure behavior of TSV under thermal cycle loading is the one to be solved urgently. In this study, the thermal expansion behavior and microstructure evolution along different paths and interfaces of TSV under thermal cycle loading are investigated base on Crystal Plasticity Element Method (CPFEM). Results reveal the evolution law of TSV grains and grain boundaries. The mechanical response along different path and interface of TSV is also clarified. Relevant results are expected to provide a certain reference for the failure analysis of TSV.
Authors
- Zhengwei Fan (ORCID: https://orcid.org/0000-0002-4975-2161)
- Yu Jiang (ORCID: https://orcid.org/0000-0003-0398-2938)
- Kaihong Hou (ORCID: https://orcid.org/0000-0003-0317-8982)
- Yashun Wang (ORCID: https://orcid.org/0000-0001-6766-6139)
- Shufeng Zhang (ORCID: https://orcid.org/0000-0002-9252-2986)
- Xun Chen (ORCID: https://orcid.org/0000-0001-7961-7908)
Institutions
- National University of Defense Technology (CN)
Publication Details
- Journal
- IEEE Transactions on Device and Materials Reliability
- Published
- 2024-10-10
- DOI
- https://doi.org/10.1109/tdmr.2024.3478183
- Citations
- 6
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 1.25
Funders
- National Natural Science Foundation of China