Simple integrated circuit reverse-engineering with deep learning: A proof of concept for automating die-polygon-capturing
The purpose of this research is to demonstrate the feasibility of automating ‘die-polygon-capturing’, an economical yet still labor-intensive technique for circuit extraction during the reverse-engineering of simple integrated circuits. As microchip designs become increasingly diverse with the ongoing trend of using application-specific integrated circuits, and considering the importance of reverse-engineering these components, die-polygon-capturing is set to play a more critical role in the future. Due to the apparent absence of prior scientific publications and limited automation efforts in this area, this paper presents a proof of concept for automating the die-polygon-capturing technique, thereby addressing a notable gap in the existing literature, with an overarching goal of reducing the labor-intensity of die-polygon-capturing. Our method consists of training deep neural networks on variations of a dataset and evaluating their segmentation capabilities of various layers and connections in an integrated circuit. Given the limited accessibility to high-quality labeled datasets, the dataset used for this research consists of two images of a single microchip, the AMD 9085D. We implemented a data augmentation process that expanded this dataset to as many as 4872 images. The experiment’s results proof the automation’s feasibility, demonstrating high scores on Intersection over Union and F-beta evaluation metrics. However the primary conclusion drawn is the need for focus on generalizability towards other types of microchips in order to effectively automate this technique for circuit extraction. • This research automates the die-polygon-capturing technique as a proof of concept. • Automating circuit layers’ semantic segmentation substantially reduces manual labor. • Each feature-set variant offers unique advantages for predicting specific labels. • Augmentation positioning influences the quality of segmentation across different layers. • Future improvements in generalization can scale automated die-polygon-capturing.
Authors
- Eva Vanmassenhove (ORCID: https://orcid.org/0000-0003-1162-820X)
- Federico Zamberlán
- Nevena Ranković (ORCID: https://orcid.org/0000-0002-9910-5886)
- Quint van der Linden
Institutions
- Tilburg University (NL)
- Universidad de Buenos Aires (AR)
Publication Details
- Journal
- Expert Systems with Applications
- Published
- 2024-10-09
- DOI
- https://doi.org/10.1016/j.eswa.2024.125479
- Citations
- 2
- Primary Topic
- Physical Unclonable Functions (PUFs) and Hardware Security
- Type
- article
- Field-Weighted Citation Impact
- 0.98