EAVREF: An Evolutionary Algorithm Based Tool for Low-Power CMOS Voltage Reference Designs

Voltage references (VRs) are essential components found in any system-on-chip, and minimizing their static power consumption can increase energy efficiency. This paper presents a computer-aided design (CAD) tool for the robust design of ultra-low-power (ULP) complementary metal-oxide-semiconductor (CMOS) VRs, which optimizes the VR target using a variability-aware evolutionary algorithm. The developed tool is implemented using the Python programming language and is compatible with the powerful Ngspice (open source), Hspice and Spectre simulators, contributing to an open-source microelectronics design flow. This paper describes the details of the developed tool, named EAVREF, such as a Figure of Merit (FoM)-based fitness function for evaluating VRs as well as the structure of the evolutionary algorithm, while also showing design examples using SkyWater 130 nm technology. Additionally, the first version of EAVREF is provided by the authors in a SourceForge repository.