Voltage Coefficient of Resistance Effect in the Harmonic Distortion of Active-RC Continuous-Time Sigma-Delta Modulators

Continuous-time sigma-delta modulators (CT-SDM) are used in many high-resolution applications, mostly in the audio band. The loop-filter of these modulators are usually realized with active-RC integrators, as these have a higher linearity compared to Gm-C integrators. In a thermal-noise limited design, the input resistors determine the signal-to-noise ratio of the CT-SDM. To minimize the silicon area, these resistors are typically implemented with high-resistivity polysilicon resistors. However, the effect of the voltage coefficient of resistance affects the integration current, resulting in harmonic distortion and a reduction in circuit performance. This paper addresses this effect by showing, at a schematic level, the effects of input resistance variation on the harmonic distortion of sigma-delta modulators. We demonstrate that a strategy to mitigate this effect for modulators with medium to high input voltage is to increase the silicon area of the input resistor.

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Published
2024-09-02
DOI
https://doi.org/10.1109/sbcci62366.2024.10703873
Citations
1
Primary Topic
Analog and Mixed-Signal Circuit Design
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article
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Voltage Coefficient of Resistance Effect in the Harmonic Distortion of Active-RC Continuous-Time Sigma-Delta Modulators

Tawan Chrysther dos Santos, Paulo César C. de Aguirre, Alessandro Girardi
1 citations
Analog and Mixed-Signal Circuit Design
0.18
article

Voltage Coefficient of Resistance Effect in the Harmonic Distortion of Active-RC Continuous-Time Sigma-Delta Modulators

Tawan Chrysther dos Santos, Paulo César C. de Aguirre, Alessandro Girardi
article en
1 citations

Abstract

Continuous-time sigma-delta modulators (CT-SDM) are used in many high-resolution applications, mostly in the audio band. The loop-filter of these modulators are usually realized with active-RC integrators, as these have a higher linearity compared to Gm-C integrators. In a thermal-noise limited design, the input resistors determine the signal-to-noise ratio of the CT-SDM. To minimize the silicon area, these resistors are typically implemented with high-resistivity polysilicon resistors. However, the effect of the voltage coefficient of resistance affects the integration current, resulting in harmonic distortion and a reduction in circuit performance. This paper addresses this effect by showing, at a schematic level, the effects of input resistance variation on the harmonic distortion of sigma-delta modulators. We demonstrate that a strategy to mitigate this effect for modulators with medium to high input voltage is to increase the silicon area of the input resistor.

Universidade Federal do Pampa (BR)
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Analog and Mixed-Signal Circuit Design
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