Design and Evaluation of a 10 GHz LNA with Balun and Diodes for HBM and CDM ESD Protection in 28 nm CMOS FD-SOI

This article presents a Low Noise Amplifier (LNA) protected against electrostatic discharges (ESD) for wireless communication systems around 10 GHz. The protection of the LNA is achieved in two stages. A balun is used to provide, simultaneously, input impedance matching and an effective primary protection against ESDs of the "Human Body Model" (HBM) type without surface loss compared to a classical matching using an inductance. Then, a secondary protection is inserted at the input transistor gate level to guard against ESDs of the "Charged Device Model" (CDM) type. Post-layout simulations (PLS) are provided to verify the radio-frequency (RF) performance of the designed LNA, while CDM measurements on fabricated devices validate the proposed ESD protections.

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Published
2024-09-02
DOI
https://doi.org/10.1109/sbcci62366.2024.10703990
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
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article

Design and Evaluation of a 10 GHz LNA with Balun and Diodes for HBM and CDM ESD Protection in 28 nm CMOS FD-SOI

Johan Bourgeat, Jean‐Marc Duchamp, Manuel J. Barragán, Philippe Ferrari et al.
Radio Frequency Integrated Circuit Design
article

Design and Evaluation of a 10 GHz LNA with Balun and Diodes for HBM and CDM ESD Protection in 28 nm CMOS FD-SOI

Johan Bourgeat, Jean‐Marc Duchamp, Manuel J. Barragán, Philippe Ferrari, Thalis Da C. Guedes
article en

Abstract

This article presents a Low Noise Amplifier (LNA) protected against electrostatic discharges (ESD) for wireless communication systems around 10 GHz. The protection of the LNA is achieved in two stages. A balun is used to provide, simultaneously, input impedance matching and an effective primary protection against ESDs of the "Human Body Model" (HBM) type without surface loss compared to a classical matching using an inductance. Then, a secondary protection is inserted at the input transistor gate level to guard against ESDs of the "Charged Device Model" (CDM) type. Post-layout simulations (PLS) are provided to verify the radio-frequency (RF) performance of the designed LNA, while CDM measurements on fabricated devices validate the proposed ESD protections.

Institut polytechnique de Grenoble (FR), Centre National de la Recherche Scientifique (FR), STMicroelectronics (France) (FR), Laboratoire de Génie Électrique de Grenoble (FR), Université Grenoble Alpes (FR)
Affordable and clean energy
Openalex Percentile: Top 85%
Radio Frequency Integrated Circuit Design
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