Analyzing Interface Trap Influence on Sensitivity, Noise, and Response Time in 2-D Material Field-Effect Transistor pH Sensors: A Theoretical Framework

This work evaluates the potential impact of interface traps on the interface of oxide and semiconductor on a 2-D-based ion-sensitive field-effect transistor (ISFET) using a surface potential-based model and Technology Computer-Aided Design (TCAD) simulation calibrated for pH sensing applications. The electrolyte/oxide interface in the proposed 2-D ISFET model is modeled using the Guoy-Chapman–Stern technique and the site binding association model. The baseline field-effect transistor (FET) of the ISFET is modeled using Fermi-Dirac statistics to obtain surface potential, which is further used to derive a compact drain current expression. The proposed ISFET model development is carried out by accounting for the interface trap effect. The voltage and current sensitivity of ISFET with and without interface traps are calculated to demonstrate the impact of interface traps in 2-D material-based pH sensors. It is observed that voltage sensitivity remains close to the Nernst limit (59 mV/pH), and a decrease in current sensitivity from 34 to 2 nA/pH is observed, as the density of interface traps is varied from 0 to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${5}\times {10} {^{{12}}}$ </tex-math></inline-formula>cm<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-}2 $ </tex-math></inline-formula>eV<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{-}1 $ </tex-math></inline-formula>. Another sensitivity metric, the transconductance to drain current ratio, is analyzed for its variation with changes in the density of interface traps. The noise level of ISFET in the presence of interface traps is analyzed, and its influence on the minimum resolvable pH is demonstrated. The proposed model prediction closely matches the TCAD simulation data obtained from a calibrated TCAD simulation setup. The model is suitable for implementation in Verilog-A for ISFET-based circuit simulation, and the impact of interface traps on the response time of ISFET-based circuits is also demonstrated.