Review—Recent Developments in Low Temperature Wafer Level Metal Bonding for Heterogenous Integration

An overview of various low-temperature (<200 °C) wafer bonding processes using metal interlayers is presented. Such processes are very attractive for novel applications in 3D heterogenous packaging as the allow for simultaneous formation of electrical interconnects, as well as hermetic encapsulation of various sensors and microelectromechanical systems-based devices. Metal wafer bonding is a generic category of processes consisting of various sub-categories, each one defined by the different principles governing the process. One can differentiate between eutectic wafer bonding (a eutectic alloy is formed as bonding layer during the process by liquid-solid interdiffusion), intermetallic wafer bonding (an intermetallic alloy is formed as bonding layer during the process by solid-liquid interdiffusion, a process known also as solid liquid intermetallic diffusion transient liquid phase, and metal thermo-compression wafer bonding. Different critical/gating parameters were investigated and their impact for generally reducing processing temperatures for the different metal bonding systems was studied.

Authors

Publication Details

Journal
ECS Journal of Solid State Science and Technology
Published
2024-10-01
DOI
https://doi.org/10.1149/2162-8777/ad8519
Citations
2
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
0.42
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article

Review—Recent Developments in Low Temperature Wafer Level Metal Bonding for Heterogenous Integration

Viorel Drăgoi, Dirk Wünsch, Hoang‐Vu Nguyen, Shuji Tanaka et al.
2 citations
ECS Journal of Solid State Science and Technology
3D IC and TSV technologies
0.42
article

Review—Recent Developments in Low Temperature Wafer Level Metal Bonding for Heterogenous Integration

Viorel Drăgoi, Dirk Wünsch, Hoang‐Vu Nguyen, Shuji Tanaka, Knut E. Aasmundtveit, Joerg Froemel, Tobias Wernicke, Vikas Dubey, Mervi Paulasto‐Kröckel, Vesa Vuorinen, Bernhard Rebhan, Marianna K. Baum, M. Wiemer, Kevin Diex
article en
2 citations

Abstract

An overview of various low-temperature (<200 °C) wafer bonding processes using metal interlayers is presented. Such processes are very attractive for novel applications in 3D heterogenous packaging as the allow for simultaneous formation of electrical interconnects, as well as hermetic encapsulation of various sensors and microelectromechanical systems-based devices. Metal wafer bonding is a generic category of processes consisting of various sub-categories, each one defined by the different principles governing the process. One can differentiate between eutectic wafer bonding (a eutectic alloy is formed as bonding layer during the process by liquid-solid interdiffusion), intermetallic wafer bonding (an intermetallic alloy is formed as bonding layer during the process by solid-liquid interdiffusion, a process known also as solid liquid intermetallic diffusion transient liquid phase, and metal thermo-compression wafer bonding. Different critical/gating parameters were investigated and their impact for generally reducing processing temperatures for the different metal bonding systems was studied.

ECS Journal of Solid State Science and TechnologyVol. 13(10)
Openalex Percentile: Top 37%
3D IC and TSV technologies
0.42
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Review—Recent Developments in Low Temperature Wafer Level Metal Bonding for Heterogenous Integration — Viorel Drăgoi, Dirk Wünsch, et al. · ECS Journal of Solid State Science and Technology (2024) | TGRS Research Map | TGRS