Low Power and High-Speed Current Mirror Based Level Shifter in Sub-Threshold Regime

This work depicts a low power and high-speed current mirror-based level shifter that operates in sub-threshold regime for different voltage domain blocks. The proposed technique eliminates the static current leakage by incorporating the leakage control transistors in the output split input inverter. In addition to that it employs devices with different sizing and multi-threshold cells in order to achieve low power and operates well in sub-threshold regime. This work has been implemented in gpdk90 nm process node which confirms that the level shifter can transform input voltage as low as 0.4V at 1MHz to 1.2V. The power and the delay for the proposed circuit at an input voltage level of 0.4 V/1MHz to an output voltage level of 1.2 V is 41.98 nW and 5.85 ns, respectively.