Temperature Compensated Read Assist Circuit to Enhance SNM of 6T SRAM in 18FDSOI Technology

In this paper a SRAM read assist circuit in 18nm FD-SOI technology using temperature-compensated word lineunderdrive (WLUD) is presented that can increase the dynamic noise margin of selected bit cells. This enhances stability during read operation at higher temperatures (at higher temperatures, noise margin is low). The proposed temperature-compensatedread assist circuit improves read stability by reducing the appliedgate voltage on the pass gates of SRAM bit cells. The amount of WLUD depends on the temperature and process variations, the readability of the selected cell will also be function of temperature,the power loss during read operation of the proposed method is also reduced as compared to previous, constant underdrive circuits up to some extent due to continuous current flowing through supply to ground during read assist. The proposed temperature-compensated read-assist method can achieve a higher sigma qualification than fixed underdrive circuits and which degrades performance at other than worst corners. The measurement result using 18-nm FDSOI technology indicates thatthe proposed temperature-compensated read assist circuit can operate without any failure up to 12% underdrive.