Proposing a Strategy to Prevent Module-level Charged Device Model Failures in Dual In-line Memory Modules

This paper proposes a method to enhance the immunity to board-level charged device model (CDM) induced electrostatic discharge (ESD) in dual in-line memory modules (DIMM) assembled with dynamic random-access memory (DRAM) components. In the industry, CDM control specification exists only for individual integrated circuit (IC) components including DRAM. However, there are instances where failures occur at levels much lower than the pre-charge voltage guaranteed by the component due to the large capacitance of modules assembled with IC components. The approach of modifying the printed circuit board (PCB) layout of the module to safely ground the discharge current is adopted as a solution. The effectiveness of this strategy is verified through the attach-detach-assessment (ADA) evaluation method, which simulates the real user environment, and actual improvements are confirmed.