Generic Parametrized Cell Design Methodology for Analog and Mixedsignal Circuits

The advancement of analog and mixed-signal circuit design demands methodologies that combine efficiency with adaptability. This paper presents a basic Parametrized Cell (PCell) Design Methodology, which employs the SKILL language for the creation of highly adaptable primitive cells. Our methodology facilitates swift parametric adjustments to meet diverse design specifications, ensuring design consistency and minimizing manual errors. To design a basic pcell we incorporate SKILL code blocks such as a constructor block for initial parameter setup, a cdf block for defining interactive parameter interfaces, a callback block for parameter changes responses, and a pcellMaster block for the main cell generation logic. The paper explores the advantages of PCell development, such as enhanced design reusability and the streamlining of design automation. It also addresses the challenges faced, including the learning curve associated with the SKILL language and the complexity of encapsulating various design constraints within a parametric model.[1] Despite these challenges, the methodology offers substantial reductions in design time and improvements in circuit robustness. Case studies are presented to illustrate the methodology's efficacy in optimizing the design process, highlighting its significant contributions to the field of integrated circuit design.

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Publication Details

Published
2024-08-08
DOI
https://doi.org/10.1109/icecsp61809.2024.10698627
Primary Topic
VLSI and FPGA Design Techniques
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article
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article

Generic Parametrized Cell Design Methodology for Analog and Mixedsignal Circuits

Aijaz M. Zaidi, Balwinder Raj, Vishal Sao, J.K. Gautam
VLSI and FPGA Design Techniques
article

Generic Parametrized Cell Design Methodology for Analog and Mixedsignal Circuits

Aijaz M. Zaidi, Balwinder Raj, Vishal Sao, J.K. Gautam
article en

Abstract

The advancement of analog and mixed-signal circuit design demands methodologies that combine efficiency with adaptability. This paper presents a basic Parametrized Cell (PCell) Design Methodology, which employs the SKILL language for the creation of highly adaptable primitive cells. Our methodology facilitates swift parametric adjustments to meet diverse design specifications, ensuring design consistency and minimizing manual errors. To design a basic pcell we incorporate SKILL code blocks such as a constructor block for initial parameter setup, a cdf block for defining interactive parameter interfaces, a callback block for parameter changes responses, and a pcellMaster block for the main cell generation logic. The paper explores the advantages of PCell development, such as enhanced design reusability and the streamlining of design automation. It also addresses the challenges faced, including the learning curve associated with the SKILL language and the complexity of encapsulating various design constraints within a parametric model.[1] Despite these challenges, the methodology offers substantial reductions in design time and improvements in circuit robustness. Case studies are presented to illustrate the methodology's efficacy in optimizing the design process, highlighting its significant contributions to the field of integrated circuit design.

STMicroelectronics (India) (IN), Dr. B. R. Ambedkar National Institute of Technology Jalandhar (IN)
Openalex Percentile: Top 85%
VLSI and FPGA Design Techniques
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Generic Parametrized Cell Design Methodology for Analog and Mixedsignal Circuits — Aijaz M. Zaidi, Balwinder Raj, et al. · (2024) | TGRS Research Map | TGRS