Influence of TVS Properties and Printed Circuit Board Design on System Level ESD Robustness for USB-C SuperSpeed data lines
A USB-C SuperSpeed application is reproduced on custom-made printed circuit boards. The influence of the properties of discrete TVS devices and the board layout on the peak voltage at the input inside the IC and the maximum IC current is investigated by means of (VF-)TLP measurements. SEED simulations are compared with the experimental results. Guidelines for an optimal system level ESD protection for the SuperSpeed data lines of this application are presented.
Authors
- Burkhard Laue
- Steffen Holland (ORCID: https://orcid.org/0000-0003-2871-1616)
- Nima Lotfi (ORCID: https://orcid.org/0000-0001-9211-6462)
- Martin Pilaski
- Stefan Seider
Publication Details
- Published
- 2024-09-16
- DOI
- https://doi.org/10.23919/eos/esd61719.2024.10702133
- Primary Topic
- Electrostatic Discharge in Electronics
- Type
- article
- Field-Weighted Citation Impact
- 0.00