Parasitic Capacitance in High-Density Neural Electrode Arrays: Sources and Evaluation Methods

Determining the sources and levels of capacitive leakage current in high-density neural electrode arrays, enables us to correct the measured value for the leakage current and thus estimate the electrode impedance and stimulation thresholds more accurately. This study highlights the importance of electrode design in developing high-density arrays with minimum capacitive leakage.

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Publication Details

Journal
IEEE Transactions on Biomedical Engineering
Published
2024-10-07
DOI
https://doi.org/10.1109/tbme.2024.3472708
Citations
2
Primary Topic
Neuroscience and Neural Engineering
Type
article
Field-Weighted Citation Impact
0.54
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article

Parasitic Capacitance in High-Density Neural Electrode Arrays: Sources and Evaluation Methods

Ali Ghazavi, Stuart F. Cogan, Philip R. Troyk
2 citations
IEEE Transactions on Biomedical Engineering
Neuroscience and Neural Engineering
0.54
article

Parasitic Capacitance in High-Density Neural Electrode Arrays: Sources and Evaluation Methods

Ali Ghazavi, Stuart F. Cogan, Philip R. Troyk
article en
2 citations

Abstract

Determining the sources and levels of capacitive leakage current in high-density neural electrode arrays, enables us to correct the measured value for the leakage current and thus estimate the electrode impedance and stimulation thresholds more accurately. This study highlights the importance of electrode design in developing high-density arrays with minimum capacitive leakage.

IEEE Transactions on Biomedical EngineeringVol. 72(2)
The University of Texas at Dallas (US), Illinois Institute of Technology (US), Bioengineering Center (RU), Neurological Surgery (US), The University of Texas Southwestern Medical Center (US), University of North Texas at Dallas (US)
Affordable and clean energy
Openalex Percentile: Top 35%
Neuroscience and Neural Engineering
0.54
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