A Scalable and Instantaneously Wideband RF Correlator Based on Margin Computing
Correlation is a fundamental operation in radar/ communication signal processing. Enabling efficient reconfigurable correlation at high frequencies with wide bandwidths and high dynamic range is a fundamental challenge. This article presents a direct-RF wideband analog correlator that utilizes a novel margin computation paradigm replacing traditional multiply-and-accumulate (MAC) with analog addition and thresholding to enable energy-efficient analog computation. A high-efficiency charge-domain realization is proposed and implemented in 65-nm CMOS occupying 0.97 mm2. The analog correlator IC supports 5-GS/s inputs, a large correlation length of 1024, and 8-bit computing accuracy with a high energy efficiency of 152 TOPS/W. Practical applications of typical high-speed correlation are also demonstrated through system-level measurements such as radar signal detection, and code-domain processing.
Authors
- Aswin Chowdary Undavalli (ORCID: https://orcid.org/0000-0003-3986-2268)
- Shantanu Chakrabartty (ORCID: https://orcid.org/0000-0002-1688-6286)
- Aravind Nagulu (ORCID: https://orcid.org/0000-0002-1481-6137)
- Kareem Rashed (ORCID: https://orcid.org/0009-0008-7721-429X)
- Arun Natarajan (ORCID: https://orcid.org/0000-0002-1613-7007)
Institutions
- Oregon State University (US)
- Washington University in St. Louis (US)
Publication Details
- Journal
- IEEE Journal of Solid-State Circuits
- Published
- 2024-10-03
- DOI
- https://doi.org/10.1109/jssc.2024.3465244
- Citations
- 4
- Primary Topic
- Satellite Communication Systems
- Type
- article
- Field-Weighted Citation Impact
- 5.20
Funders
- National Science Foundation
- Defense Advanced Research Projects Agency