Experimental Demonstration of Dual-Mode PUF/Memory Based on SOT-MRAM Array

The state-of-the-art dual-mode design executes the physical unclonable function (PUF) based on the static entropy source, which is theoretically independent of the memory function. Reuse of memory arrays contributes to multifunctional simultaneous operation and high efficiency. In our study, we first extend the dual-mode design on the fabricated spin-orbit-torque (SOT) arrays. Using 180nm CMOS technology, the basic cell includes the complementary pair of two flexible-controlled 2T1J structures. The refined readout methods are discussed to expand the challenge-response pairs (CRPs) space and reduce the impact of memory-related issues within PUF mode. The proposed PUF presents 49.84% uniformity and 49.72% inter-HD. By analyzing in depth the spatial dependence of process consistency, the non-ideal-CRP percentage decreased from 17.61% to 9.14%, effectively enhancing the reliability. Our findings pave the way for advancing SOT-MRAM in security solutions.

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Publication Details

Journal
IEEE Electron Device Letters
Published
2024-10-03
DOI
https://doi.org/10.1109/led.2024.3470758
Citations
6
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
1.25

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article

Experimental Demonstration of Dual-Mode PUF/Memory Based on SOT-MRAM Array

Zhengyi Hou, Yuanfu Zhao, Zhaohao Wang, Weisheng S. Zhao et al.
6 citations
IEEE Electron Device Letters
Integrated Circuits and Semiconductor Failure Analysis
1.25
article

Experimental Demonstration of Dual-Mode PUF/Memory Based on SOT-MRAM Array

Zhengyi Hou, Yuanfu Zhao, Zhaohao Wang, Weisheng S. Zhao, Wang Bi, Chuanpeng Jiang, Min Wang
article en
6 citations

Abstract

The state-of-the-art dual-mode design executes the physical unclonable function (PUF) based on the static entropy source, which is theoretically independent of the memory function. Reuse of memory arrays contributes to multifunctional simultaneous operation and high efficiency. In our study, we first extend the dual-mode design on the fabricated spin-orbit-torque (SOT) arrays. Using 180nm CMOS technology, the basic cell includes the complementary pair of two flexible-controlled 2T1J structures. The refined readout methods are discussed to expand the challenge-response pairs (CRPs) space and reduce the impact of memory-related issues within PUF mode. The proposed PUF presents 49.84% uniformity and 49.72% inter-HD. By analyzing in depth the spatial dependence of process consistency, the non-ideal-CRP percentage decreased from 17.61% to 9.14%, effectively enhancing the reliability. Our findings pave the way for advancing SOT-MRAM in security solutions.

IEEE Electron Device LettersVol. 45(12)
Beijing Microelectronics Technology Institute (CN), Beihang University (CN)
National Natural Science Foundation of China, National Key Research and Development Program of China
Affordable and clean energy
Openalex Percentile: Top 20%
Integrated Circuits and Semiconductor Failure Analysis
1.25
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Experimental Demonstration of Dual-Mode PUF/Memory Based on SOT-MRAM Array — Zhengyi Hou, Yuanfu Zhao, et al. · IEEE Electron Device Letters (2024) | TGRS Research Map | TGRS