Passivating and low damaging plasma etching of GaN using Cl₂ and SiCl₄ for recessed gate MOSc-HEMT devices

Abstract Plasma etching steps are critical for metal–oxide–semiconductor channel high electron mobility transistors gate fabrication as they can deteriorate electrical performances due to gallium nitride degradation. Adding SiCl 4 to a low bias Cl 2 plasma in presence of a SiN hard mask environment forms a silicon-based passivation layer that protects GaN from nitrogen depletion (N/Ga = 1) as extracted from X-ray photoelecron spectroscopy measurements. The deposited layer is not removed by subsequent surface treatments that precede the gate dielectric deposition such as O 2 plasma and HCl. This nitrogen preservation as well as the passivation’s presence result in a higher flat band voltage ( V FB ) due to less positive charge generation at the GaN/dielectric interface. This SiCl 4 -based etching process could then be used as a 20 nm plasma etching finishing step in order to recover GaN surface after a fast and damaging trench formation process.