Power and area efficient FIR filter using Radix- 2r multiplier for de-noise the electrooculography (EOG) signal

This article introduces a novel FIR filter using a Radix-2r multiplier combined with 4:2 and 3:2 compressors for denoising Electrooculography (EOG) signals. This approach replaces traditional ripple-carry adders with compressors to add the partial products generated by the Radix-2r multiplier, resulting in reduced delay and energy consumption. The FIR filter is implemented in gate-level Verilog HDL, verified using ModelSim and Altera DSP Builder, and synthesized with the Cadence RTL compiler. Compared to conventional designs, the proposed filter achieves a 71.48% reduction in area, 73.28% reduction in power, 51.84% reduction in delay, 86.22% reduction in the area-delay product (ADP), and 92.38% reduction in energy-per-operation (EPS), significantly outperforming the SOPOT filter.

Authors

Institutions

Publication Details

Journal
Scientific Reports
Published
2024-09-30
DOI
https://doi.org/10.1038/s41598-024-73514-5
Citations
2
Primary Topic
Gaze Tracking and Assistive Technology
Type
article
Field-Weighted Citation Impact
0.74
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Power and area efficient FIR filter using Radix- 2r multiplier for de-noise the electrooculography (EOG) signal

Gundugonti Kishore Kumar, Kankanala Srinivas, Naga Raghuram Chinnapurapu
2 citations
Scientific Reports
Gaze Tracking and Assistive Technology
0.74
article

Power and area efficient FIR filter using Radix- 2r multiplier for de-noise the electrooculography (EOG) signal

Gundugonti Kishore Kumar, Kankanala Srinivas, Naga Raghuram Chinnapurapu
article en
2 citations

Abstract

This article introduces a novel FIR filter using a Radix-2r multiplier combined with 4:2 and 3:2 compressors for denoising Electrooculography (EOG) signals. This approach replaces traditional ripple-carry adders with compressors to add the partial products generated by the Radix-2r multiplier, resulting in reduced delay and energy consumption. The FIR filter is implemented in gate-level Verilog HDL, verified using ModelSim and Altera DSP Builder, and synthesized with the Cadence RTL compiler. Compared to conventional designs, the proposed filter achieves a 71.48% reduction in area, 73.28% reduction in power, 51.84% reduction in delay, 86.22% reduction in the area-delay product (ADP), and 92.38% reduction in energy-per-operation (EPS), significantly outperforming the SOPOT filter.

Scientific ReportsVol. 14(1)
Siddhartha Medical College (IN), SRM University (IN)
Affordable and clean energy
Openalex Percentile: Top 28%
Gaze Tracking and Assistive Technology
0.74
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.