Processing-in-Memory Accelerators Toward Efficient Real-World Machine Learning

Machine learning (ML) toward the edge revolutionizes the real world. However, unlike advanced algorithms, hardware development shows stagnant progress for fundamental limitations by heterogeneity. Instead, processing-in-memory (PIM) infusing computing capability into memories is gaining significant attention as a promising paradigm. While emerging memories like resistive RAM (RRAM) further boost efficiency, my research unveils suboptimal efficiency in prior RRAM-based PIMs since heterogeneity unignorably exists across hierarchy (vertical) and units (horizontal). Against heterogeneity for high efficiency, I've proposed cross-layer solutions by pioneering architecture and system levels, which provide a strong foundation for future computing. Specifically, the research impacts include novel 3D architectures, systemic paradigms, and chips. As robustness becomes vital along with efficiency, the PIM research moves toward robustness by accelerating private ML of more compute-and data-intensive models. As such, my research with/beyond PIM will provide various hardware solutions to keep improving efficiency by addressing heterogeneity and guaranteeing robustness through interdisciplinarity.