An Adaptive Re-Read Strategy for Mitigating Temporary Read Errors in 3D-NAND Flash Solid-State Drives
The application of High-density storage technology such as Triple-Level Cell (TLC) and Quad-Level Cell (QLC) have compressed the voltage margin between adjacent states, significantly enhancing storage capacity. However, the sacrifice of threshold voltage margin exacerbates reliability issues that are less prominent in lower bit densities, such as the temporary read errors (TRE) phenomenon. In this study, we developed an Adaptive Re-read (ARR) scheme aimed at mitigating read failures caused by TRE and reducing read latency of 3D-NAND flash based TLC SSD.
Authors
- Jian Huang (ORCID: https://orcid.org/0000-0001-7315-4252)
- Xinrui Zhang (ORCID: https://orcid.org/0009-0002-3301-6861)
- Zhiyi Yu (ORCID: https://orcid.org/0000-0003-4048-2991)
- Xianping Liu (ORCID: https://orcid.org/0009-0008-3110-5223)
- Ruibin Zhou
- Yuhan Wang (ORCID: https://orcid.org/0000-0001-6451-1166)
Institutions
- Sun Yat-sen University (CN)
Publication Details
- Published
- 2024-08-21
- DOI
- https://doi.org/10.1109/nvmsa63038.2024.10693677
- Primary Topic
- Advanced Data Storage Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00