Read Retry Mechanism for 3D NAND Flash Memory: Observations, Analyses, and Solutions

The read retry mechanism is implemented in high-density NAND flash memory to recover data when the default read reference voltage fails to read out the data. In this paper, we have evaluated the read retry mechanism of 3D triple-level cell (TLC) NAND flash memory on real platform under different program/erase (P/E) cycles and retention times. Based on our preliminary experiments, we found out that read retry cases sequence provided by the manufacturer could be optimized under different P/E cycles. Thus we first focus on finding the static read retry cases sequences under different environmental factors based on the statistic results. Observing that the static approach requires a time-consuming training process, we further utilize three dynamic strategies, including LRU, MFU, and Last Option, to reorder the sequence of read retry cases adaptively at runtime. The experiment results showed that LRU performed best among static and dynamic approaches without the training overhead. Compared with the original read retry cases sequence, the proposed dynamic strategies could reduce the average read retry count up to 85.2%.