Reliability of Tunneling Regime for Silicon on Insulator-Based Neuron
Low-power operations are essential for implementing large spiking neural networks (SNNs) in real-world applications. An area and energy-efficient demonstration of a functional liquid state machine (LSM) for spoken word detection using the band-to-band-tunneling (BTBT)-based neuron was proposed earlier. For a product-level demonstration of the BTBT regime operating chips, the variability and reliability of neurons emerge as noteworthy concerns for neuromorphic processors due to the potential implications for performance degradation over time. In this work, we characterize and compare the reliability of partially depleted (PD) silicon on insulator (SOI) transistors in the BTBT and on-regime (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\text {ON}}$ </tex-math></inline-formula>) regimes. The drain current fractional degradation (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\Delta }{I}_{\text {D}}/{I}_{\text {D}}$ </tex-math></inline-formula>) increases with an increase in voltage and thermal stress in the BTBT and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\text {ON}}$ </tex-math></inline-formula> regime. The reaction-diffusion-drift (RDD) framework is used to estimate device degradation under operating bias conditions. At operating bias, a ~17% fractional degradation is observed in the BTBT regime operation for ten years, comparable to the degradation observed in the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{\text {ON}}$ </tex-math></inline-formula> regime. Finally, we analyzed the impact of device degradation on the SNN performance.
Authors
- Sandip Lashkare (ORCID: https://orcid.org/0000-0003-2018-1681)
- Shubham Patil (ORCID: https://orcid.org/0000-0003-2375-481X)
- Rashmi Saikia (ORCID: https://orcid.org/0000-0001-8142-4355)
- Nihar R. Mohapatra (ORCID: https://orcid.org/0000-0002-8827-5417)
- Karansingh Thakor
- Veeresh Deshpande (ORCID: https://orcid.org/0000-0002-0349-4857)
- R. Gaurav (ORCID: https://orcid.org/0009-0006-8749-3881)
- Udayan Ganguly (ORCID: https://orcid.org/0000-0002-1498-5993)
- Jay Sonawane
- Ajay Kumar Singh (ORCID: https://orcid.org/0000-0002-7235-7530)
- Abhishek Kadam
Institutions
- Indian Institute of Technology Bombay (IN)
- Indian Institute of Technology Gandhinagar (IN)
Publication Details
- Journal
- IEEE Transactions on Electron Devices
- Published
- 2024-09-30
- DOI
- https://doi.org/10.1109/ted.2024.3462377
- Citations
- 2
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.42