Defect-Free SiGe/Si Multistacks for Next-Generation CFET Architectures

The advancement of CMOS technology nodes demands increasingly complex device architectures. In this frame, the epitaxial deposition of complicated SiGe/Si multistacks presents a significant technology challenge required to enable such cutting-edge devices. This work presents the characterization of defect-free multistacks featuring SiGe layers with two possible Ge concentrations and incorporating either two or six stacked Si nanosheets. Our comprehensive analysis reveals good matching with the nominal structures and demonstrates remarkable repeatability of the Si channels. Furthermore, the multistacks exhibit ideal surface morphology, crucial for subsequent processing steps. Notably, the study also highlights optimal wafer-to-wafer repeatability, a key factor in ensuring consistent performance across large-scale production.

Authors

Publication Details

Journal
ECS Transactions
Published
2024-09-27
DOI
https://doi.org/10.1149/11402.0047ecst
Citations
2
Primary Topic
3D IC and TSV technologies
Type
article
Field-Weighted Citation Impact
0.42
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article

Defect-Free SiGe/Si Multistacks for Next-Generation CFET Architectures

Rami Khazaka, Niels Claessens, Brendan Marozas, Gianluca Rengo et al.
2 citations
ECS Transactions
3D IC and TSV technologies
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article

Defect-Free SiGe/Si Multistacks for Next-Generation CFET Architectures

Rami Khazaka, Niels Claessens, Brendan Marozas, Gianluca Rengo, Daniel Casey
article en
2 citations

Abstract

The advancement of CMOS technology nodes demands increasingly complex device architectures. In this frame, the epitaxial deposition of complicated SiGe/Si multistacks presents a significant technology challenge required to enable such cutting-edge devices. This work presents the characterization of defect-free multistacks featuring SiGe layers with two possible Ge concentrations and incorporating either two or six stacked Si nanosheets. Our comprehensive analysis reveals good matching with the nominal structures and demonstrates remarkable repeatability of the Si channels. Furthermore, the multistacks exhibit ideal surface morphology, crucial for subsequent processing steps. Notably, the study also highlights optimal wafer-to-wafer repeatability, a key factor in ensuring consistent performance across large-scale production.

ECS TransactionsVol. 114(2)
Openalex Percentile: Top 38%
3D IC and TSV technologies
0.42
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Defect-Free SiGe/Si Multistacks for Next-Generation CFET Architectures — Rami Khazaka, Niels Claessens, et al. · ECS Transactions (2024) | TGRS Research Map | TGRS