(Keynote) Epitaxial Si/SiGe Multi-Stacks: From Stacked Nano-Sheet to Fork-Sheet and CFET Devices

After a short description of the evolution of metal-oxide-semiconductor (MOS) device architectures and the corresponding requirements on epitaxial growth processes, the manuscript describes the material properties of complicated Si/SiGe multi-layer stacks used for complementary field effect transistor (CFET) devices. They contain two different Ge concentrations and have been grown using conventional process gases. A relatively high growth temperature is used to obtain acceptable Si and SiGe growth rates. Still island growth has been suppressed for Ge concentrations up to 40%. Excellent structural and optical material properties of the Si/SiGe multi-layer stack will be reported, with up to 3 + 3 Si channels in the top and bottom part of the stack, respectively. The absence/presence of lattice defects has been verified by room temperature photoluminescence measurements. Photoluminescence measurements at low temperatures are used to study band-to-band luminescence from individual sub-layers and to illustrate the optical material quality of the CFET stack.

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Publication Details

Journal
ECS Transactions
Published
2024-09-27
DOI
https://doi.org/10.1149/11402.0015ecst
Citations
1
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.21

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article

(Keynote) Epitaxial Si/SiGe Multi-Stacks: From Stacked Nano-Sheet to Fork-Sheet and CFET Devices

Olivier Richard, Roger Loo, Clément Porret, Matteo Beggiato et al.
1 citations
ECS Transactions
Advancements in Semiconductor Devices and Circuit Design
0.21
article

(Keynote) Epitaxial Si/SiGe Multi-Stacks: From Stacked Nano-Sheet to Fork-Sheet and CFET Devices

Olivier Richard, Roger Loo, Clément Porret, Matteo Beggiato, Hans Mertens, Mustafa Ayyad, Erik Rosseel, Keisuke Yamamoto, Andriy Hikavyy, Andrea Impagnatiello, Alex Merkulov, Naoto Horiguchi, Tamás Sipőcz, Dong Wang, Yosuke Shimura, Thomas Dursap, Árpád Kerekes, Anjani Akula, Han Han, R. Langer, Janusz Bogdanowicz
article en
1 citations

Abstract

After a short description of the evolution of metal-oxide-semiconductor (MOS) device architectures and the corresponding requirements on epitaxial growth processes, the manuscript describes the material properties of complicated Si/SiGe multi-layer stacks used for complementary field effect transistor (CFET) devices. They contain two different Ge concentrations and have been grown using conventional process gases. A relatively high growth temperature is used to obtain acceptable Si and SiGe growth rates. Still island growth has been suppressed for Ge concentrations up to 40%. Excellent structural and optical material properties of the Si/SiGe multi-layer stack will be reported, with up to 3 + 3 Si channels in the top and bottom part of the stack, respectively. The absence/presence of lattice defects has been verified by room temperature photoluminescence measurements. Photoluminescence measurements at low temperatures are used to study band-to-band luminescence from individual sub-layers and to illustrate the optical material quality of the CFET stack.

ECS TransactionsVol. 114(2)
Agentschap Innoveren en Ondernemen, European Commission, Fonds Wetenschappelijk Onderzoek, Electronic Components and Systems for European Leadership, Japan Society for the Promotion of Science
Openalex Percentile: Top 48%
Advancements in Semiconductor Devices and Circuit Design
0.21
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