Physical Insights and Accurate Modeling of Transconductance in Body-Contacted Dynamically Depleted SOI MOSFETs

In this work, we present a physical understanding and a robust surface potential coupling relationship essential to accurately capture the transconductance in body-contacted (BC) dynamically depleted silicon-on-insulator (DDSOI) MOSFETs for varied body biases. It is observed that the crossover of transconductance for varied body biases occurs before the peak transconductance is reached for devices operating particularly in the saturation region. This phenomenon is investigated in detail and attributed to partial-depletion-to-full-depletion transition in the silicon body that occurs before the peak transconductance is reached, in the saturation region of operation. The proposed coupling relationship effectively captures this behavior, ensuring symmetry of the overall model around <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {ds}} = 0$ </tex-math></inline-formula> V and correct harmonic characteristics in linear and saturation regions, which are critical for RF IC design. An enhanced mobility model with improved body bias dependency has also been proposed that helps in the accurate validation of transconductance. The model is validated with state-of-the-art industry hardware data from GlobalFoundries. The model has been integrated into our new industry standard symmetric BSIM-SOI compact model framework.

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Publication Details

Journal
IEEE Transactions on Electron Devices
Published
2024-09-27
DOI
https://doi.org/10.1109/ted.2024.3461670
Citations
8
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
1.67

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article

Physical Insights and Accurate Modeling of Transconductance in Body-Contacted Dynamically Depleted SOI MOSFETs

Anamika Singh Pratiyush, Debashish Nandi, Sreenidhi Turuvekere, Naveen Karumuri et al.
8 citations
IEEE Transactions on Electron Devices
Advancements in Semiconductor Devices and Circuit Design
1.67
article

Physical Insights and Accurate Modeling of Transconductance in Body-Contacted Dynamically Depleted SOI MOSFETs

Anamika Singh Pratiyush, Debashish Nandi, Sreenidhi Turuvekere, Naveen Karumuri, Chetan Kumar Dabhi, Yogesh Singh Chauhan, Dinesh Rajasekharan, Satyasuresh Choppalli, Chenming Hu
article en
8 citations

Abstract

In this work, we present a physical understanding and a robust surface potential coupling relationship essential to accurately capture the transconductance in body-contacted (BC) dynamically depleted silicon-on-insulator (DDSOI) MOSFETs for varied body biases. It is observed that the crossover of transconductance for varied body biases occurs before the peak transconductance is reached for devices operating particularly in the saturation region. This phenomenon is investigated in detail and attributed to partial-depletion-to-full-depletion transition in the silicon body that occurs before the peak transconductance is reached, in the saturation region of operation. The proposed coupling relationship effectively captures this behavior, ensuring symmetry of the overall model around <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {ds}} = 0$ </tex-math></inline-formula> V and correct harmonic characteristics in linear and saturation regions, which are critical for RF IC design. An enhanced mobility model with improved body bias dependency has also been proposed that helps in the accurate validation of transconductance. The model is validated with state-of-the-art industry hardware data from GlobalFoundries. The model has been integrated into our new industry standard symmetric BSIM-SOI compact model framework.

IEEE Transactions on Electron DevicesVol. 71(11)
Indian Institute of Technology Kanpur (IN), University of California, Berkeley (US)
Science and Engineering Research Board
Openalex Percentile: Top 16%
Advancements in Semiconductor Devices and Circuit Design
1.67
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