A Multi-Scale Feature Fusion Network for Chip Surface Defect Detection
Chip surface defect detection plays a crucial role in semiconductor manufacturing and the electronics industry. However, chip surface defects have relatively tiny defect areas and complex defect features make the chip surface defect detection task low in accuracy. In this paper, we propose a multi-scale feature fusion network based on encoder-decoder architecture to solve this challenge. Particularly, we propose a Residual Feature Fusion Attention Module (RFFAM) and an Intersection over Union Loss for Defect with Auxiliary Bounding Box (DA-IoU), and we incorporate a Transformer Prediction Head (TPH) for the network. Additionally, in order to solve the problem of the shortage of chip surface defect datasets, this paper proposes a chip surface defect dataset containing four defect categories. The experimental results show that the method not only improves the detection accuracy but also maintains a small number of parameters, satisfying the engineering requirements of chip surface defect detection.
Authors
- Wei Zhou (ORCID: https://orcid.org/0000-0003-4300-811X)
- Mengke Tian (ORCID: https://orcid.org/0000-0003-4849-5535)
- Guanwen Zhang (ORCID: https://orcid.org/0009-0003-0413-5412)
- Haoang Ren
Institutions
- Northwestern Polytechnical University (CN)
- Beijing Microelectronics Technology Institute (CN)
Publication Details
- Published
- 2024-09-27
- DOI
- https://doi.org/10.1109/icip51287.2024.10647644
- Citations
- 3
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.63