Improvement of Thermal Stability in Dual Mechanism Memory Using Hf<sub>x</sub>Al<sub>1-x</sub>O Blocking Layer for 3D V-NAND Flash Application

Dual mechanism memory, which combines charge trapping and polarization switching, was demonstrated as a way to overcome the limited memory window of charge trap flash (CTF) memory. However, due to the poor thermal stability of the Hfy Zr<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {1-y}}$ </tex-math></inline-formula>O (HZO) film, the dual mechanism memory scheme cannot be integrated into the current 3D V-NAND flash device fabrication process where the poly-silicon channel is deposited and annealed after the HZO blocking layer is deposited. In this study, HfxAl<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {1-x}}$ </tex-math></inline-formula> O (HAO) is investigated as the blocking layer due to its superior thermal stability. The dual mechanism memory with HAO blocking layer has achieved a 47% larger memory window compared to the device with HZO blocking layer. It is also demonstrated that the expanded memory window of the dual mechanism memory with HAO enables quad-level cell operation (QLC) with 1 V spacing between each state.

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Publication Details

Journal
IEEE Electron Device Letters
Published
2024-09-26
DOI
https://doi.org/10.1109/led.2024.3468466
Citations
4
Primary Topic
Semiconductor materials and devices
Type
article
Field-Weighted Citation Impact
0.83

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article

Improvement of Thermal Stability in Dual Mechanism Memory Using HfxAl1-xO Blocking Layer for 3D V-NAND Flash Application

Sheung Hun Kim, Youngkeun Park, Byung Jin Cho, Eui Joong Shin et al.
4 citations
IEEE Electron Device Letters
Semiconductor materials and devices
0.83
article

Improvement of Thermal Stability in Dual Mechanism Memory Using HfxAl1-xO Blocking Layer for 3D V-NAND Flash Application

Sheung Hun Kim, Youngkeun Park, Byung Jin Cho, Eui Joong Shin, Jaejoong Jeong, Jun Hong Chu, Changyeon Kang
article en
4 citations

Abstract

Dual mechanism memory, which combines charge trapping and polarization switching, was demonstrated as a way to overcome the limited memory window of charge trap flash (CTF) memory. However, due to the poor thermal stability of the Hfy Zr<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {1-y}}$ </tex-math></inline-formula>O (HZO) film, the dual mechanism memory scheme cannot be integrated into the current 3D V-NAND flash device fabrication process where the poly-silicon channel is deposited and annealed after the HZO blocking layer is deposited. In this study, HfxAl<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text {1-x}}$ </tex-math></inline-formula> O (HAO) is investigated as the blocking layer due to its superior thermal stability. The dual mechanism memory with HAO blocking layer has achieved a 47% larger memory window compared to the device with HZO blocking layer. It is also demonstrated that the expanded memory window of the dual mechanism memory with HAO enables quad-level cell operation (QLC) with 1 V spacing between each state.

IEEE Electron Device LettersVol. 45(12)
Korea Advanced Institute of Science and Technology (KR)
National Research Foundation of Korea, Samsung
Affordable and clean energy
Openalex Percentile: Top 27%
Semiconductor materials and devices
0.83
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Improvement of Thermal Stability in Dual Mechanism Memory Using Hf<sub>x</sub>Al<sub>1-x</sub>O Blocking Layer for 3D V-NAND Flash Application — Sheung Hun Kim, Youngkeun Park, et al. · IEEE Electron Device Letters (2024) | TGRS Research Map | TGRS