A Fast-Convergence Near-Memory-Computing Accelerator for Solving Partial Differential Equations
Solving partial differential equations (PDEs) is omnipresent in scientific research and engineering and requires expensive numerical iteration for memory and computation. The primary concerns for solving PDEs are convergence speed, data movement, and power consumption. This work proposed the first fast-convergence PDE solver with an automatic adjustment multiple-stride iteration method, significantly increasing the PDE convergence speed. A dynamic-precision near-memory-computing architecture with booth encoding is proposed to reduce iterated intermediate data movement. A customized 32T compressor and a 14T full adder are designed to reduce the power and hardware cost of the solver. The processor is fabricated using 65-nm CMOS technology and occupies a 6.25 mm2 die area. It can achieve a convergence speedup by <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4\times $ </tex-math></inline-formula> compared with the existing work.
Authors
- Zhuang Shao (ORCID: https://orcid.org/0000-0002-3132-5727)
- Chenjia Xie (ORCID: https://orcid.org/0000-0003-4982-6770)
- Li Du (ORCID: https://orcid.org/0000-0003-2687-6978)
- Xingyuan Hu
- Yuan Du (ORCID: https://orcid.org/0000-0002-5316-619X)
- Ning Bo Zhao (ORCID: https://orcid.org/0009-0002-5070-077X)
Institutions
- Nanjing University (CN)
Publication Details
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Published
- 2024-09-26
- DOI
- https://doi.org/10.1109/tvlsi.2024.3458801
- Citations
- 2
- Primary Topic
- Matrix Theory and Algorithms
- Type
- article
- Field-Weighted Citation Impact
- 0.72
Funders
- National Key Research and Development Program of China