Effectiveness of the Heat Spreader in GaN HEMT Studied by a Co-Simulation Approach

This article examines thermal management using a co-simulation approach with Silvaco and Ansys software to analyze heat distribution and thermal profiles in GaN high electron mobility transistor (HEMT) devices within transistor packages. The model is constructed based on a simplified Ga-Non-Si HEMT structure. The efficacy of various materials specifically sapphire, SiC, and polycrystalline diamond (PCD) with different thermal conductivities as heat spreaders is assessed at different device locations. For the original Si-GaN-Si<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf>N<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> chip, the peak junction temperature, T<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j_max</inf> is 175.0 °C at an output power density of 5 W/mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. The relative increase in T<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j_max</inf> compared to the non-junction area on the GaN surface, ΔT<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j_max</inf> is 5.5%, indicating the thermal crosstalk effect. When a 10 μm-thick PCD (thermal conductivity of 1200 W/mꞏK) heat spreader is added to the Si-GaN-Si<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</inf>N<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</inf> chip, T<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j_max</inf> drops to 171.5 °C, and ΔT<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j_max</inf> reduces to 3.4% (38% reduction). Replacing the Si substrate with PCD further reduces T<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j_max</inf> to 167.7 °C and ΔT<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j_max</inf> to 1.5% (73% reduction). The addition of PCD layers mitigates the "spike-like" thermal profile due to enhanced heat distribution from the hotspot. Even though the reduction in T<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j_max</inf> is minimal, PCD primarily aids in heat spreading, redistributing heat from hotspots across the chip. This improves heat distribution, mitigates thermal gradients, and reduces localized overheating, which can prevent thermal crosstalk and potential damage to the device