Design to Improve Performance in Two-Stage 48-to-1V Architecture for Server Power Supply

The voltage regulator modules (VRMs) designed for the 48 V bus architecture necessitate high efficiency and compactness, along with fast dynamic performance across a wide range of input voltage and load conditions. This paper investigates modern architectures suitable for these high conversion factor converters, categorizing them into three groups based on their fundamental power processing principles. A comparative analysis is conducted among these categories, and based on a) simplicity in design, b) adherence to regulation criteria, c) non-isolated structure, and d) flat efficiency profile throughout the load range, the cascaded architecture is selected. A cascaded two-stage converter is proposed, featuring a 4:1 Active Half-Bridge converter for the first stage to step down the nominal 48 V input to an intermediate 12 V bus voltage for the last stage converter. The last stage employs a buck-derived series capacitor buck converter, leveraging reduced device stress and digital current mode control. Simulation studies demonstrate the fast dynamic response of both stage converters under a 60 W step load change. An initial hardware prototype is constructed, and experimental results validate the design's efficacy for a 60 A step load change with a 48 V input voltage and 1 V output voltage.