A Fractional Spur Cancellation Technique for Fractional-N Frequency Synthesizers Enabled by Dual Loop Phase Clamping
A fractional spur cancellation technique for fractional-N frequency synthesizers is presented in this paper. A time domain quantitative analysis is performed to obtain an intuitive understanding of the origin of fractional spurs. By utilizing a dual loop architecture that generates two feedback phases leading and lagging to the reference phase, respectively, the proposed technique can clamp the reference phase in the middle of the two feedback phases, and realize the spur cancellation after combining the complementary outputs of the two charge pumps. Simulation results demonstrate that the proposed technique can improve the worst-case fractional spur level by more than 50dB.
Authors
- Tanwei Yan (ORCID: https://orcid.org/0000-0003-3607-8195)
- José Silva-Martínez (ORCID: https://orcid.org/0000-0002-7960-0177)
- Junning Jiang (ORCID: https://orcid.org/0000-0001-6540-3060)
Institutions
- Texas A&M University (US)
Publication Details
- Published
- 2024-08-11
- DOI
- https://doi.org/10.1109/mwscas60917.2024.10658953
- Citations
- 1
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.21